In general, a metal layer and an insulating layer are deposited or a micro pattern is formed on one semiconductor substrate to form a semiconductor device. Further, the semiconductor device may be formed by joining two or more semiconductor substrates on which a thin film layer, such as the metal layer and the insulating layer, and the micro pattern may be formed.
As used herein, the semiconductor substrate or a wafer may be a substrate obtained by cultivating a semiconductor raw material and single-crystallizing the semiconductor raw material like a rod, thinly die-cutting the single-crystallized semiconductor a material according to crystal orientation, and grinding and polishing the die-cut semiconductor raw material. When two or more semiconductor substrates are joined, an error may be generated during alignment of the semiconductor substrates. In general, in the alignment of the semiconductor substrates, alignment keys formed in the semiconductor substrates may be adjusted by using an optical measurement method to join the semiconductor substrates. However, as reported in the related arts, a fine error may also be generated. Further, an alignment error may be generated by heat expansion during a plurality of joining processes, or a metal layer may reflow by heat or pressure during the joining, thereby causing a defect.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.